The present invention generally relates to fabrication of the semiconductor devices and more particularly to a method of forming a metal film and a deposition apparatus used therefor, fabrication process of a semiconductor device that includes such a film formation process of metal film, and a computer-readable recording medium recording a control program of such a film formation process.
In the art of semiconductor devices, it is generally practiced to form a low-resistance silicide layer on the surface of source/drain diffusion regions for reducing contact resistance of a metal contact plug such as W plug contacted to such diffusion regions.
Generally, a low-resistance silicide layer is formed by a so-called salicide process that causes deposition of a metal film on the surface of a silicon substrate in which the source/drain diffusion regions are formed or on a polysilicon gate electrode, followed by a thermal annealing process for causing silicide formation reaction. In such a salicide process, unreacted metal film is removed by a selective wet etching process.
With ultra-miniaturized semiconductor devices of these days, junction depth of the source/drain diffusion regions is reducing in the prospect of suppressing short channel effect, and it is thought preferable to form the source/drain diffusion regions with a depth of 100 nm or less particularly in the case the MOS transistor is the one having a gate length of 35 nm or less.
When forming a silicide layer on the surface of such a shallow diffusion region, there is a need of conducting the silicide formation reaction at low temperatures such that change of impurity distribution profile in the diffusion regions is suppressed as much as possible.
In view of the circumstances noted above, use of Co film or Ni film is spreading in view of the fact that the silicide formation reaction can be conducted at low temperatures with these metal films. Such a metal film is generally formed by a sputtering process.
Patent Reference 1 Japanese Laid-Open Patent Application 10-324969
Patent Reference 2 Japanese Laid-Open Patent Application 2000-105916
Patent Reference 3 Japanese Laid Open Patent Application 2004-244690